Microprocessor and pin out diagram of 8085 pdf and ppt.
8085 microprocessor
➢ 8085 is a 40 pin IC.
➢ Its operating voltage is 5volts.
➢ Its operating frequency is 5MHz.
PIN OUT DIAGRAM
Address bus :
It is a group of 16 lines.
➢ i.e A0 – A15.
➢ It is unidirectional.
➢ Bits flow in 1 direction from the microprocessor unit to the peripheral devices and uses the high order address bus.
Control and Status signals :
Two control signals RD and WR.
3 status signals IO/ M , S1 AND S0.
1 Special signal ALE.
ALE
▪ Stands for address latch enable signal.
▪ It is the 30th pin of 8085.
▪ Used to enable or disable the address bus.
RD
➢Stands for read control signal.
➢It is active low.
➢When it is low the selected memory or input – output
device is read.
WR
➢Stands for write control signal.
➢It is active low.
➢When it goes low the data bus is written into the selected memory or input – output location.
IO/M
➢Stands for Input-output/memory.
➢Used to differentiate between i/o and memory operation.
➢This signal combined with RD and WR to generate i/o and memory control signals.
S1 and S2
➢These are status signals.
➢Similar to IO/M.
➢Can identify various operations.
➢But rarely used in small system.
Power supply
1. Vcc → +5v power supply.2. Vss → Ground reference.
3. X1 , X2 →
• A crystal is connected at these two pins.
• Frequency is internally divided by 2, therefore, to operate a system at 3MHz , the crystal should have a frequency of 6MHz.
Clock frequency
CLK ( OUT) → Clock output. This signal can be used as the system clock for other devics.
Interrupts and peripheral initiated signals
INTR → An interrupt request signals.
INTA → An interrupt acknowledgement sent by the microprocessor after intr is received.
Reset in → This signals is used to reset the microprocessor by setting the program counter to zero.
Reset out → This signals is used to reset all the connected devices when the microproccesor is reset.
Ready → This signal indicates that the device is ready to send or receive data. If ready is low, then the CPU has to wait for the ready to go low.
Hold→ This signal indicates that another master is requesting the use of the address and data buses.
HLDA→ It indicates that the CPU has received the hold request and it will relinquish the bus in the next clock cycle. HLDA is set to low after the hod signal is removed.
Serial I/O Signals
SOD → Serial output dataline. The output SOD is SET/RESET as specified by the SIM instruction. An output line for serial data.
SID→ Serial input dataline. The data on this line is loaded into accumulator whenever a RIM instruction is executed. An input line for serial data
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